Mohamed Al Mahdi Eshtawie and Masuri Othman
Institute of Microengineering and Nanoelectronics , Universiti Kebangsaan Malaysia
Finite impulse response (FIR) filters have the disadvantage of high order need for desired
specifications than their IIR counterpart. The high order demand imposes more hardware
requirements, arithmetic operations, area usage, and power consumption when designing and
fabricating the filter. Therefore, minimizing or reducing these parameters, is a primary goal or
target in digital filter design task. This paper presents an algorithm proposed for modifying the
number of non-zero coefficients used to represent the FIR digital pulse shaping filter response.
With this algorithm, the FIR filter frequency and phase response can be represented with a
minimum number of non-zero coefficients. Therefore, the arithmetic operations needed to get the
filter output is reduced. Consequently, the overall system cost in terms of power consumption
and area needed is also reduced. The proposed algorithm is more powerful when integrated with
multiplierless algorithms such as distributed arithmetic (DA) in designing high order digital FIR
filters. In this case, the DA technique will be used to eliminate the need for multiplier block in
the multiply and accumulate unit (MAC) and the proposed algorithm will reduce the number of
adders and addition operations needed to get the filter output.